In the fabrication of devices and integrated circuits of sub-50 nm, a key problem is how to obtain patterns of sub-50 nm by lithography. As the patterns are so fine, it is very difficult to achieve them by nowadays optical photolithography technology. An efficient way to achieve them is the electron-beam lithography. However, the electron-beam lithography has disadvantages of low exposure speed and low exposure efficiency, which significantly impact the researches and developments.